Mr. HASMUKHBHAI KORINGA

Faculty Details


  • Designation : Assistant Professor
  • Qualification : ME(EC), Ph.D.(EC)
  • Experience : 8 Years
  • Area Of Interest : VLSI Design, Circuits and Networks and Digital Logic Design

Educational Qualification

University

Degree

Year

Result

Division

Field of

Specialization

Saurashtra

B.E.

2004

70.14%

Distinction

Electronics &

Communication

Gujarat

M.E.

2006

73.24%

Distinction

Communication

System Engineering

Gujarat Technology University

Ph. D.

2017

 

Electronics & Communication

Work Experience

Institute

Designation

Period

L. D. College of Engineering, Ahmedabad,Gujarat India

Visiting Lecturer

01/01/2005 to 30/06/2006

G. H. Patel College of Engg. And Technology,

V. V .Nagar, Gujarat-India

Ad hoc Lecturer

01/07/2006 to 02/10/2006

G. H. Patel College of Engg. And Technology,

V. V .Nagar, Gujarat-India

Assistant Professor

03/10/2006 to 24/05/2011

Government Engineering College, Rajkot, Gujarat-India

Assistant Professor

25/05/2011 to Continue

Skill and knowledge

 


 

 

Software Languages known:

 

 


 

 

 

1. Assembly Languages of 8085/8086/8051

2. VHDL

3. C

 

Software Tools known:

1. MAXPLUS II, QUARTUS II, MODELSIM

2. MATLAB

3. ORCAD

4. PSPICE

5.MULTISIM

6. ADS


Course Taught

Subject taught:

In UG level:

<!--[if !supportLists]-->1)      <!--[endif]-->Basic Electrical and Electronics Engineering

<!--[if !supportLists]-->2)      <!--[endif]-->Fundamental of Electronics

<!--[if !supportLists]-->3)      <!--[endif]-->Digital circuits and systems

<!--[if !supportLists]-->4)      <!--[endif]-->Digital Logic Design

<!--[if !supportLists]-->5)      <!--[endif]-->Advanced Electronics

<!--[if !supportLists]-->6)      <!--[endif]-->Signals and Systems

<!--[if !supportLists]-->7)      <!--[endif]-->Digital Signal Processing

<!--[if !supportLists]-->8)      <!--[endif]-->VLSI Technology and design

<!--[if !supportLists]-->9)      <!--[endif]-->Telecommunication Switching

<!--[if !supportLists]-->10)<!--[endif]--> Circuits & Networks

<!--[if !supportLists]-->11)<!--[endif]--> Electronics and Communication

 

In PG Level:

<!--[if !supportLists]-->1)      <!--[endif]-->ASIC Design

<!--[if !supportLists]-->2)      <!--[endif]-->Digital VLSI

<!--[if !supportLists]-->3)      <!--[endif]-->Telecommunication Switching

<!--[if !supportLists]-->4)      <!--[endif]-->RF Lab.

Training and Workshop

Short term training programs organized and attended:

<!--[if !supportLists]-->Ø <!--[endif]-->Conducted One week practical sessions and attended ISTE sponsored STTP on “Real Time Application Development using Digital Signal Processors & FPGAs” organized by G H Patel College of  Engineering & Tech. during June 2-7, 2008.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended One week AICTE sponsored STTP on “Advance Laboratory Techniques in RF & Microwaves” organized by SVNIT, SURAT during December 22-26, 2008.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended One week AICTE sponsored STTP on “Microwave Integrated Circuits” organized by SVNIT, SURAT during June 16th to 20th, 2008.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended one week STTP on “Complete ASIC Design Flow” organized by eInfochips Ltd. at Dharmsinh Desai University during May 4-8, 2009.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended One week short term training program on “Recent Trend in VLSI and Communication System” organized by EC Department of National Institute of Technology-Hamirpur during 10th to 14th June 2013.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended One week short term training program on “MSP-430 Architecture Programming and Applications” organized by Government Engineering College, Rajkot during 18th to 22nd November 2013.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended Two week “Induction Phase I” training program organized by Government Engineering College, Rajkot during 6th to 17th January 2014.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended one week training program on “Microcontroller and embedded system” organized by Indian Institute of Technology Gandhinagar, during 12th to 16th May 2014.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended one week training program on “FPGA based Digital Design” organized by Indian Institute of Space Technology, Thiruvathpuram, during 9th to 13th June 2014.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended Two week university training program on “Analog Circuit for Electronics System Design” organized by Texas Instrument at B M S Engineering College, Banglore during 30th June to 9th July 2014.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended Two week ISTE workshop on  “Control Systems ” conducted by IIT Kharagur Under the National Mission on Education through ICT(MHRD, Govt. of India) at B H Gardi College of Engineering, Rajkot during 2nd to 12th December 2014.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended One week training program on “VLSI System Design and Verification” organized by Marwadi Education Foundation, Rajkot during 17th to 21st march 2015.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended One week training program on “Recent Developments in VLSI and Image Processing” organized by Vishwakarma Government Engineering College, Chandkheda- Ahmedabad during 18th to 22nd May 2015.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended one week training program on “FPGA Based Digital System Design” organized by Government Engineering College Rajkot during 25th to 29th May 2015.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended one week STTP on “Digital Signal Processing” organized by Indian Institute of Technology Bombay under CEP during 2nd to 6th November 2015.

<!--[if !supportLists]-->Ø  <!--[endif]-->Coordinate one week training program on “FPGA Based Digital System Design” for Faculties at government engineering college Rajkot during 25th to 29th May 2015.

 

Workshops/ Symposiums organized and attended:

<!--[if !supportLists]-->Ø  <!--[endif]-->Organized ISTE sponsored one day workshop on “First Step towards VLSI Design” held on 31st January, 2009 at G.H. Patel College of Engineering & Technology.

<!--[if !supportLists]-->Ø  <!--[endif]-->Organized ISTE sponsored one day workshop on “First Step towards VLSI Design” held on September, 2009 at G.H. Patel College of Engineering & Technology.

<!--[if !supportLists]-->Ø  <!--[endif]-->Organized ISTE sponsored one day workshop on “Digital Design using VHDL” held on 5th March, 2010 at G.H. Patel College of Engineering & Technology.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended one day workshop on “Embedded Systems: Application to Industrial Automation” organized by Electronics and communication department and ISTE chapter, A.D. Patel Institute of technology, new vallabh vidyanagar on 28th sep. 2007.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended one day Symposium on “Digital Image Processing: resent trends” organized by GCET ISTE Chapter & EC Department, G. H. Patel college of Engineering & Technology, vallabh vidyanagar on 7th July 2007.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended Three day training on “Karmayogi Residential Training for Quality Improvement Program in Technical Education” organized by Commissionerate of Technical Education at Prerana Dham, Junagadh during 23rd to 25th January 2014.

<!--[if !supportLists]-->Ø  <!--[endif]-->Co-coordinated and given expert lectures in 3 days workshop on “Digital Design using CPLD and FPGA” organized by EC Department Government Engineering College Rajkot during 25th to 27th August 2014.

<!--[if !supportLists]-->Ø  <!--[endif]-->Attended 3 days International conference on “Design for a Billion” organized by Indian institute of Technology Gandhinagar during 7th to 9th November 2014.


Administrative work Portfolios

1) Class Coordinator

2) Lab Incharge
3) Help students for university administrative exam related work
4) Departmental GTU work
5) BISAG committee member
6) Virtual lab assistant nodal officer
7) POST TEQIP Co-coordinator
8) SSIP publication work committee member

Research and Project

-

Publications

Publications/Presentations:

<!--[if !supportLists]-->Ø  <!--[endif]-->Published paper on “MATLAB Simulation and VLSI Implementation of ATM Batcher Banyan Switch with Trap and it’s comparative analysis” at the International Conference Emerging technologies in Telecommunication Convergence organized by  IETE Mumbai during January 10th to 12th, 2007.

<!--[if !supportLists]-->Ø  <!--[endif]-->Published paper on “MATLAB Simulation and VLSI Implementation of ATM Knockout Switch” at the national Conference Emerging systems and Technologies (NEST-06) organized by LIET-Rajasthan during June 8th to 10th 2006.

<!--[if !supportLists]-->Ø  <!--[endif]-->Presented paper on GSM at National level Technical paper presentation TECH-UTKARSH-2003 conducted by AITS – Rajkot during 27th - 28th sep., 2003.

<!--[if !supportLists]-->Ø  <!--[endif]-->Presented paper on “Neural Network at National level Technical paper presentation INNOVATION-2004 conducted by C.U. Shah College of Engineering and Technology, Wadhwan City during 13th -14th Oct., 2004. 

<!--[if !supportLists]-->Ø  <!--[endif]-->Published paper on “FPGA Implementations of method for improved coefficient precision FIR filter” at the International Conference Second International Conference on Signals, Systems & Automation (ICSSA-11) organized by EC Department, G H Patel College of Engineering & Technology, Gujarat, India during 24-25 January, 2011.

<!--[if !supportLists]-->Ø  <!--[endif]-->Published paper on Estimation and Optimization of Power dissipation in CMOS VLSI circuit design: A Review Paper in International Journal of Emerging Trends in Electrical and Electronics (IJETEE) vol.1 issue 3th March-2013 ISSN No. 2320-9569 Impact Factor 3.84.

<!--[if !supportLists]-->Ø  <!--[endif]-->Published paper on “Power Optimization in VLSI Circuit Design: A Review paper” in IICMR Research Journal I4, Vol.8 ,Issue 1,March 2014,ISSN No.0975 2757.

<!--[if !supportLists]-->Ø  <!--[endif]-->Published research paper on “High Power Gain Low Noise Amplifier Design for Next Generation 1-7GHz Wideband RF Frontend RFIC using 0.18µm CMOS” Presented  in 19th International Symposium on VLSI Design and Test (VDAT-2015) organized by VLSI Society of India Collaboration with IEEE Computer Society & TTTC at Nirma University Ahmedabad during june 26-29, 2015 publication available in IEEE Explore Digital Library with DOI 10.1109/ISVDAT.2015.7208105.

<!--[if !supportLists]-->Ø  <!--[endif]-->Published paper on “High Gain Low Power GPS RF Frontend LNA Design and Optimization Using 0.18µm CMOS” Publish in Peer review international journal of Engineering and research vol. 3 issue 3 May, 2015 ISSN No. ISSN: 2321-7758.

<!--[if !supportLists]-->Ø  <!--[endif]-->Published paper on “Design and Optimization of Narrow Band Low Noise Amplifier using 0.18µm CMOS” Presented in international conference of communication and networking 2015 organized by ITM University collaboration with IEEE at ITM University, Gwalior during 19th to 21st November 2015. Publication available on IEEE Explore Digital Library with DOI 10.1109/ICCN.2015.21 page No. 100 to 106.

<!--[if !supportLists]-->Ø  <!--[endif]-->Hasmukh P Koringa, Dr. Vipul A Shah “Ultra Wideband Low Noise Amplifier Design and Optimization for Next Generation RF Receiver using 0.18µm CMOS in  3rd International Conference on Microelectronics, Circuits & Systems (Micro2016 ) organized by maulana Abul kalam Azad University of Technology, West Bengal in Association with IEEE(EDS) & IASTM at science city, Kolkata during 9th -10th , July 2016. Conference proceeding page no. 70 – 76.

Academic Projects

Guided and successfully completed more than 25 under graduate level projects.


Guided and completed 2 master of engineering project.

Completed my Ph.D. work in the field of RF front end design using CMOS.

Patent Filed

-

Professional Institution Membership

 Lifetime member of ISTE LM53078 

Expert Lectures

Given various expert lectures in work and Training program for students and faculties. 

Awards

-